A high-performance architecture and BDD-based synthesis methodology for packet classification

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 22, Issue 6, 2003, Pages 698-709

  Prakash, Amit ^a   Kotla, Ramakrishna ^a   Mandal, Tanmoy ^a,b   Aziz, Adnan ^a  

^a The University of Texas at Austin   (United States)

^b NVIDIA   (United States)

Author keywords

Binary decision diagram (BDD); IP forwarding; Logic synthesis; Packet classification

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DYNAMIC PROGRAMMING; PROBLEM SOLVING; ROUTERS;

BINARY DECISION DIAGRAMS (BDD);

COMPUTER AIDED DESIGN;

EID: 0037704242     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2003.811449     Document Type: Conference Paper

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