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Volumn 291, Issue 2, 2003, Pages 143-157

Additive symmetries: The non-negative case

Author keywords

Additive symmetric value; Correction; Floating point arithmetic; IEEE 754 standard

Indexed keywords

ALGEBRA; APPROXIMATION THEORY; DIGITAL ARITHMETIC; MATHEMATICAL OPERATORS;

EID: 0037419521     PISSN: 03043975     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0304-3975(02)00223-2     Document Type: Article
Times cited : (1)

References (15)
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    • J. Harrison, A machine-checked theory of floating point arithmetic, in: Y. Bertot, G. Dowek, A. Hirschowitz, C. Paulin, L. Théry (Eds.), Proc. 12th Internat. Conf. on Theorem Proving in Higher Order Logics, Nice, France, 1999, pp. 113-130.
    • (1999) Proc. 12th Internat. Conf. on Theorem Proving in Higher Order Logics , pp. 113-130
    • Harrison, J.1
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    • Langlois, P.1
  • 12
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    • Automatic reduction of round-off errors in floating point arithmetic
    • J.-C. Bajard, other (Eds.), Marseilles, France, in French
    • P. Langlois, F. Nativel, Automatic reduction of round-off errors in floating point arithmetic, in: J.-C. Bajard, other (Eds.), Proc. Second Real Numbers and Computer Conf., Marseilles, France, 1996, pp. 199-214 (in French).
    • (1996) Proc. Second Real Numbers and Computer Conf. , pp. 199-214
    • Langlois, P.1    Nativel, F.2
  • 13
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    • A mechanically checked proof of the AMD5K86 floating point division
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    • (1998) IEEE Trans. Comput. , vol.47 , Issue.9 , pp. 913-926
    • Moore, J.S.1    Lynch, T.2    Kaufmann, M.3
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    • Some algebraic properties of floating-point arithmetic
    • J.-C. Bajard, et al. (Eds.), Dagsthul, Germany
    • J.-M. Muller, Some algebraic properties of floating-point arithmetic, in: J.-C. Bajard, et al. (Eds.), Proc. RNC-4, Real Numbers and Computer Conf., Dagsthul, Germany, 2000, pp. 21-38.
    • (2000) Proc. RNC-4, Real Numbers and Computer Conf. , pp. 21-38
    • Muller, J.-M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.