A low-power precomputation-based fully parallel content-addressable memory

IEEE Journal of Solid-State Circuits

Volumn 38, Issue 4, 2003, Pages 654-662

  Lin, Chi Sheng ^a   Chang, Jui Chuan ^a   Li, Bin Da ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

CAM; Low power voltage; Precomputation based; Pseudo nMOS

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; NAND CIRCUITS; RANDOM ACCESS STORAGE; VLSI CIRCUITS;

LOW POWER; LOW VOLTAGE; PRECOMPUTATION-BASED CONTENT ADDRESSABLE MEMORY; PSEUDO-NMOS;

ASSOCIATIVE STORAGE;

EID: 0037389024     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.809515     Document Type: Article

References (17)

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