Parallel execution of a connected component labeling operation on a linear array architecture

Journal of Information Science and Engineering

Volumn 19, Issue 2, 2003, Pages 353-370

  Wang, Kuang Bor ^a   Chia, Tsorng Lin ^b   Chen, Zen ^c   Lou, Der Chyuan ^a  

^a NATIONAL DEFENSE UNIVERSITY   (Taiwan)

^b MING CHUAN UNIVERSITY   (Taiwan)

^c NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

Connected component labeling; Linear array; Parallel algorithm; Parallel processing; Processing element

Indexed keywords

COMPUTER HARDWARE; COMPUTER SIMULATION; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS;

CONNECTED COMPONENT LABELING; LINEAR ARRAY ARCHITECTURE;

COMPUTER ARCHITECTURE;

EID: 0037352104     PISSN: 10162364     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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