Extending the life of planar CMOS with multigate CMOS devices

Solid State Technology

Volumn 46, Issue 3, 2003, Pages 26-28

  Borland, John O ^a   Iwai, Hiroshi ^b   Maszara, Witek ^d   Wang, Howard ^c  

^a Varian Semiconductor Equip Assoc   (United States)

^b TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^c TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

^d NONE

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; DIFFUSION IN SOLIDS; GATES (TRANSISTOR); SEMICONDUCTOR DOPING; SILICON WAFERS;

SHORT CHANNEL EFFECTS (SCE);

CMOS INTEGRATED CIRCUITS;

EID: 0037351494     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Review

References (7)

1. D. Vogler, Wafer NEWS, p. 9, August 5, 2002.
2. H. Twai, Varian Semiconductor Equip. Associates vTech seminar, San Francisco, CA, July 22, 2002.
3. W. Maszara, MRS Symp. Proc., V. 686, p. 59, 2001.
4. R. Divakaruni, G. Bronner, the Electrochemical Society, PV2001-2, March 2001.
5. J. Borland, Varian Semiconductor Equipment Associates vTech seminar, San Francisco, CA, July 22, 2002.
6. D. Sadana, Varian Semiconductor Equipment Associates vTech seminar, San Francisco, CA, July 22, 2002.
7. J.O. Borland et al., Solid State Technology, p. 83, June 2002.