Ultra thin ICs and MEMS elements: Techniques for wafer thinning, stress-free separation, assembly and interconnection

Microsystem Technologies

Volumn 9, Issue 3, 2003, Pages 176-182

  Feil, M ^a   Adler, C ^a   Klink, G ^a   Konig M ^a   Landesberger, C ^a   Scherbaum, S ^a   Schwinn, G ^a   Spohrle H ^a  

^a Fraunhofer Institute Reliability and Microintegration   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ASSEMBLY; CHARGE CARRIERS; ETCHING; INTEGRATED CIRCUITS; MICROELECTROMECHANICAL DEVICES; MICROPROCESSOR CHIPS; PLASTIC TAPES; SILICON WAFERS; SURFACE TOPOGRAPHY;

DRY ETCHED CHIP GROOVES; INTERCONNECTION; STRESS-FREE SEPARATION; ULTRA THIN INTEGRATED CIRCUITS; WAFER THINNING;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 0037281908     PISSN: 09467076     EISSN: None     Source Type: Journal    
DOI: 10.1007/s00542-002-0223-5     Document Type: Article

References (7)

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3. Landesberger Ch et al (2001) New dicing and thinning concept improves mechanical reliability of ultra thin silicon. International Symposium and Exhibition on Advanced Packaging Materials, Braselton, Georgia, pp. 92-97
4. Müller J et al (2000) Smart card assembly requires advanced pre-assembly methods. Semiconductor Int 23 (8): 191-200
5. Ramm P et al (2001) InterChip via technology for vertical system integration. International Interconnect Technology Conf., Burlingame, CA, USA, pp. 160-163
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7. Usami M (1999) Thin silicon chips and ACF connection technology for contactless IC cards. The International Microelectronic Conference, IMAPS 1999, Chicago, pp. 309-312