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Volumn 14, Issue 1, 2003, Pages 243-247

Computing with phase locked loops: Choosing gains and delays

Author keywords

Acquisition time; Free running frequencies; Phase locked loops (PLLs); Synchronism; Synchronous state

Indexed keywords

ERROR ANALYSIS; FREQUENCIES; GAIN MEASUREMENT; NEURAL NETWORKS; PATTERN RECOGNITION; SYNCHRONIZATION;

EID: 0037276907     PISSN: 10459227     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNN.2002.806633     Document Type: Article
Times cited : (20)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.