-
1
-
-
0242445972
-
Embedded systems and the micro-processor
-
April
-
N. Tredennick and B. Shimamoto, "Embedded systems and the micro-processor," Microprocessor Rep., vol. 14, no. 4, April 2000.
-
(2000)
Microprocessor Rep.
, vol.14
, Issue.4
-
-
Tredennick, N.1
Shimamoto, B.2
-
2
-
-
0034226001
-
SPEC CPU2000: Measuring CPU performance in the new millenium
-
July
-
J. L. Henning, "SPEC CPU2000: Measuring CPU performance in the new millenium," IEEE Computer, vol. 33, pp. 28-35, July 2000.
-
(2000)
IEEE Computer
, vol.33
, pp. 28-35
-
-
Henning, J.L.1
-
4
-
-
0036524662
-
Crossroads for mixed-signal chips
-
Mar
-
P. L. Levin and R. Ludwig, "Crossroads for mixed-signal chips," IEEE Spectrum, vol. 39, pp. 38-42, Mar. 2002.
-
(2002)
IEEE Spectrum
, vol.39
, pp. 38-42
-
-
Levin, P.L.1
Ludwig, R.2
-
5
-
-
0034262311
-
A case study in embedded systems design: An engine control unit
-
T. Cuatto, C. Passerone, C. Sansoe, F. Oregoretti, and A. Sangiovanni-Vincentelli, "A case study in embedded systems design: An engine control unit," Design Automat. Embedded Syst., vol. 6, pp. 71-88, 2000.
-
(2000)
Design Automat. Embedded Syst.
, vol.6
, pp. 71-88
-
-
Cuatto, T.1
Passerone, C.2
Sansoe, C.3
Oregoretti, F.4
Sangiovanni-Vincentelli, A.5
-
6
-
-
0017493286
-
A universal algorithm for sequential data compression
-
May
-
J. Ziv and A. Lempel, "A universal algorithm for sequential data compression," IEEE Trans. Inform. Theory, vol. IT-23, pp, 337-343, May 1977.
-
(1977)
IEEE Trans. Inform. Theory
, vol.IT-23
, pp. 337-343
-
-
Ziv, J.1
Lempel, A.2
-
7
-
-
0021439618
-
A technique for high-performance data compression
-
June
-
T. A. Welch, "A technique for high-performance data compression," IEEE Computer, vol. 17, pp. 8-19, June 1984.
-
(1984)
IEEE Computer
, vol.17
, pp. 8-19
-
-
Welch, T.A.1
-
8
-
-
0035265985
-
Algorithms and data structures for compressed memory machines
-
Mar
-
P. A. Franaszek, P. Heidelberger, D. E. Poff, and J. T. Robinson, "Algorithms and data structures for compressed memory machines," IBM J. Res. Develop., vol. 45, no. 2, pp. 245-258, Mar. 2001.
-
(2001)
IBM J. Res. Develop.
, vol.45
, Issue.2
, pp. 245-258
-
-
Franaszek, P.A.1
Heidelberger, P.2
Poff, D.E.3
Robinson, J.T.4
-
9
-
-
0035265704
-
Memory expansion technology (MXT): Competitive impact
-
Mar
-
T. B. Smith, B. Abali, D. E. Poff, and R. B. Tremaine, "Memory expansion technology (MXT): Competitive impact," IBM J. Res. Develop., vol. 45, no. 2, pp. 303-309, Mar. 2001.
-
(2001)
IBM J. Res. Develop.
, vol.45
, Issue.2
, pp. 303-309
-
-
Smith, T.B.1
Abali, B.2
Poff, D.E.3
Tremaine, R.B.4
-
10
-
-
0242614254
-
RISC code compression model
-
Chicago, IL, Mar
-
A. Miretsky, A. Ben-Efraim, V. Sukonik, A. Saper, A. Ginsberg, R. Natan, and A. Dor, "RISC code compression model," in Proc. Embedded Systems Conf., Chicago, IL, Mar. 1999.
-
(1999)
Proc. Embedded Systems Conf.
-
-
Miretsky, A.1
Ben-Efraim, A.2
Sukonik, V.3
Saper, A.4
Ginsberg, A.5
Natan, R.6
Dor, A.7
-
11
-
-
0032207443
-
A decompression core for powerPC
-
Nov
-
T. M. Kemp, R. M. Montoye, J. D. Harper, J. D. Palmer, and D. J. Auerbach, "A decompression core for powerPC," IBM J. Res. Develop., vol. 42, no. 6, pp. 807-812, Nov. 1998.
-
(1998)
IBM J. Res. Develop.
, vol.42
, Issue.6
, pp. 807-812
-
-
Kemp, T.M.1
Montoye, R.M.2
Harper, J.D.3
Palmer, J.D.4
Auerbach, D.J.5
-
12
-
-
0026989701
-
Executing compressed programs on an embedded RISC architecture
-
A. Wolfe and A. Chanin, "Executing compressed programs on an embedded RISC architecture," in Proc. Int. Symp. Microarchitecture, 1992, pp. 81-91.
-
(1992)
Proc. Int. Symp. Microarchitecture
, pp. 81-91
-
-
Wolfe, A.1
Chanin, A.2
-
14
-
-
0033353551
-
Evaluation of a high-performance code compression method
-
Haifa, Israel, Nov
-
C. Lefurgy, E. Piccininni, and T. Mudge, "Evaluation of a high-performance code compression method," in Proc. Int. Symp. Microarchitecture, Haifa, Israel, Nov. 1999, pp. 93-102.
-
(1999)
Proc. Int. Symp. Microarchitecture
, pp. 93-102
-
-
Lefurgy, C.1
Piccininni, E.2
Mudge, T.3
-
15
-
-
0003623951
-
-
Motorola Semiconductor Products Sector
-
MPC 555 User's Manual MPC555UM/AD, Motorola Semiconductor Products Sector, 1999.
-
(1999)
MPC 555 User's Manual MPC555UM/AD
-
-
-
16
-
-
0033300484
-
32-bit architectures for embedded systems
-
Austin, TX, Oct
-
R. Stence, "32-bit architectures for embedded systems," in Proc. Int. Conf. Computer Design, Austin, TX, Oct. 1999, pp. 503-508.
-
(1999)
Proc. Int. Conf. Computer Design
, pp. 503-508
-
-
Stence, R.1
-
19
-
-
0026946988
-
The chimera II real-time operating system for advanced sensor-based control applications
-
Nov./Dec
-
D. B. Stewart, D. E. Schmitz, and P. K. Khosla, "The chimera II real-time operating system for advanced sensor-based control applications," IEEE Trans. Syst., Man, Cybern., vol. 22, pp. 1282-1295, Nov./Dec. 1992.
-
(1992)
IEEE Trans. Syst., Man, Cybern.
, vol.22
, pp. 1282-1295
-
-
Stewart, D.B.1
Schmitz, D.E.2
Khosla, P.K.3
-
20
-
-
0141722997
-
Software peripherals requirements and constraints for real-time embedded systems
-
San Diego, CA, Dec
-
D. Lioupis, A. Papagiannis, D. Psihogiou, and M. Stefanidakis, "Software peripherals requirements and constraints for real-time embedded systems," in IEEE Real-Time Embedded System Workshop, San Diego, CA, Dec. 2001.
-
(2001)
IEEE Real-Time Embedded System Workshop
-
-
Lioupis, D.1
Papagiannis, A.2
Psihogiou, D.3
Stefanidakis, M.4
-
21
-
-
0242445968
-
Cache design for embedded real-time systems
-
Danvers, MA, June
-
B. Jacob, "Cache design for embedded real-time systems," in Embedded Systems Conf., Danvers, MA, June 1999.
-
(1999)
Embedded Systems Conf.
-
-
Jacob, B.1
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