Enhanced resolution for future fabrication

IEEE Circuits and Devices Magazine

Volumn 19, Issue 1, 2003, Pages 43-47

  Fritze, Michael ^a   Chen, Chenson K ^a   Astolfi, David K ^a   Yost, Donna Ruth ^a   Burns, James A ^a   Chen, Chang Lee ^a   Gouker, Pascale M ^a   Suntharalingam, Vyshnavi ^a   Wyatt, Peter W ^a   Keast, Craig L ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; GATES (TRANSISTOR); IMAGING TECHNIQUES; LIGHT INTERFERENCE; MASKS; OPTICAL RESOLVING POWER; PHASE SHIFT; PHOTOLITHOGRAPHY; POLYSILICON; REACTIVE ION ETCHING; SCANNING ELECTRON MICROSCOPY; SILICON ON INSULATOR TECHNOLOGY;

OPTICAL RESOLUTION ENHANCEMENT METHODS; PHASE SHIFT LITHOGRAPHY; PHOTOMASKS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0037230485     PISSN: 87553996     EISSN: None     Source Type: Journal    
DOI: 10.1109/MCD.2003.1175107     Document Type: Article

References (14)

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