0.8 V CMOS adiabatic differential switch logic circuit using bootstrap technique for low-voltage low-power VLSI

Electronics Letters

Volumn 38, Issue 24, 2002, Pages 1497-1499

  Zhang, Y ^a   Chen, H H ^a,b   Kuo, J B ^a,b  

^a UNIVERSITY OF WATERLOO   (Canada)

^b NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT TESTING; SWITCHING CIRCUITS; VLSI CIRCUITS;

BOOTSTRAP TECHNIQUE; CMOS ADIABATIC DIFFERENTIAL SWITCH LOGIC CIRCUIT; LOW-VOLTAGE LOW-POWER VLSI;

LOGIC CIRCUITS;

EID: 0037153494     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20021042     Document Type: Article

References (4)

1. KUO, J.B., and LOU, J.H.: 'Low-voltage CMOS VLSI circuits' (Wiley, New York, 1999)
2. YEH, C.C., LOU, J.H., and KUO, J.B.: '1.5 V CMOS fully-swing energy efficient logic (EEL) circuit suitable for low-voltage and low-power VLSI application', Electron. Lett., 1997, 33, (16), pp. 1375-1376
3. LAW, C.F., YEO, K.S., and SAMIR, R.S.: 'Sub-1 V bootstrapped CMOS driver for giga-scale-integration era', Electron. Lett. 1999, 35, (5), pp. 392-393
4. YEO, K.S., MA, J.G., and DO, M.A.: 'Ultra-low-voltage bootstrapped CMOS driver for high performance applications', Electron. Lett., 2000, 36, (8), pp. 706-707.