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Computer Networks

Volumn 38, Issue 3, 2002, Pages 295-310

Dynamic hardware plugins: Exploiting reconfigurable hardware for high-performance programmable routers

(4) Taylor, David E a Turner, Jonathan S a Lockwood, John W a Horta, Edson L a

a WASHINGTON UNIVERSITY (United States)

Author keywords

Active networking; FPGA; Partial reconfiguration; Port processor; Programmable router; Reconfigurable hardware

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER NETWORKS; FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM PROCESSORS; SOFTWARE PROTOTYPING;

DYNAMIC HARDWARE PLUGINS (DHP); PROGRAMMABLE ROUTERS;

ROUTERS;

EID: 0037148717 PISSN: 13891286 EISSN: None Source Type: Journal
DOI: 10.1016/S1389-1286(01)00289-4 Document Type: Article

Times cited : (26)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.