Parallelised max-Log-Map model

Electronics Letters

Volumn 38, Issue 17, 2002, Pages 971-972

  Loo, K K ^a   Salman, K ^a   Alukaidey, T ^a   Jimaa, S A ^a  

^a UNIVERSITY OF HERTFORDSHIRE   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL SIGNAL PROCESSING; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS;

ADD COMPARE SELECT OPERATIONS; MAXIMUM A POSTERIORI ALGORITHM;

VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 0037102025     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20020663     Document Type: Article

References (3)

1. Optimal decoding of linear codes for minimising symbol error rate
2. Optimal and sub-optimal maximum a posteriori algorithms suitable for turbo decoding
3. 3rd generation partnership project; technical specification group radio access network; multiplexing and channel coding (FDD)