Leakage power analysis and reduction during behavioral synthesis

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 10, Issue 6, 2002, Pages 876-885

  Khouri, Kamal S ^a   Jha, Niraj K ^b  

^a MOTOROLA INC   (United States)

^b PRINCETON UNIVERSITY   (United States)

Author keywords

High level synthesis; Leakage power; Power analysis; Power optimization

Indexed keywords

ALGORITHMS; LEAKAGE CURRENTS; SWITCHING; THRESHOLD VOLTAGE;

LEAKAGE POWER ANALYSIS;

VLSI CIRCUITS;

EID: 0037002450     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2002.808436     Document Type: Article

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