90 nm generation Cu/CVD low-k (k<2.5) interconnect technology

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 583-586

  Bao, T I ^a   Ko, C C ^a   Song, J Y ^a   Li, L P ^a   Lu, H H ^a   Lu, Y C ^a   Chen, Y H ^a   Jang, S M ^a   Liang, M S ^a  

^a TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; ATOMIC FORCE MICROSCOPY; LEAKAGE CURRENTS; LITHOGRAPHY; PERMITTIVITY; PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION; POROSITY; SEMICONDUCTING SILICON COMPOUNDS; TENSILE STRESS;

DIELECTRIC LAYERS;

DIELECTRIC MATERIALS;

EID: 0036932325     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. S.M. Jang, et al., VLSI Tech Symp., pp 18 (2002)
2. W. Chang, et al., IEDM Tech. Dig., pp. 603 (2001)
3. J. C. Lu, et al., IITC, pp. 63 (2002)
4. K. Mosig et al., IITC, pp. 292 (2001)