Receiver-less clocking of a CMOS digital circuit using short optical pulses

Conference Proceedings - Lasers and Electro-Optics Society Annual Meeting-LEOS

Volumn 1, Issue , 2002, Pages 127-128

  Bhatnagar, Aparna ^a   Debaes, Christof ^b   Chen, Ray ^a   Helman, Noah C ^a   Keeler, Gordon A ^a   Agarwal, Diwakar ^a   Thienpont, Hugo ^b   Miller, David A B ^a  

^a STANFORD UNIVERSITY   (United States)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FLIP FLOP CIRCUITS; LASER MODE LOCKING; LASER PULSES; OPTICAL BEAM SPLITTERS; PHOTOCURRENTS; PHOTODETECTORS; SEMICONDUCTOR DIODES; SEMICONDUCTOR QUANTUM WELLS; SILICON ON SAPPHIRE TECHNOLOGY; TIMING CIRCUITS; TIMING JITTER;

OPTICAL PULSES; PSEUDO RANDOM BIT SEQUENCE GENERATOR; ULTRA THIN SILICON ON SAPPHIRE PROCESS;

DIGITAL INTEGRATED CIRCUITS;

EID: 0036924387     PISSN: 10928081     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. W.J. Dally, J. Poulton, Digital Systems Engineering, Cambridge Univ. Press, NY 1998.
2. C. Debaes, D. Agarwal, A. Bhatnagar, H. Theinpont, D.A.B. Miller, "High Impedance High Frequency Silicon Detector Response for Precise Receiverless Optical Clock Injection", Proc. SPIE, Vol 4654 (2002).
3. G. A. Keeler, D. Agarwal, C. Debaes, B.E. Nelson, N.C. Helman, D.A.B. Miller, "Optical Pump-Probe Latency Measurement of Silicon CMOS Optical Interconnects", -IEEE LEOS 2001, CA, Postdeadline paper 1.6.