On theoretical and practical considerations of path selection for delay fault testing

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 94-100

  Liou, Jing Jia ^a   Wang, Li C ^a   Cheng, Kwang Ting ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEEP SUB-MICRON DESIGNS; DELAY FAULT TESTING; PATH SELECTION;

CRITICAL PATH ANALYSIS; HEURISTIC METHODS; OPTIMIZATION; STATISTICAL METHODS;

INTEGRATED CIRCUIT TESTING;

EID: 0036916519     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774586     Document Type: Conference Paper

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