A 43-Gb/s full-rate-clock 4: 1 multiplexer in InP-based HEMT technology

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 12, 2002, Pages 1703-1709

  Nakasha, Yasuhiro ^a   Suzuki, Toshihide ^a   Kano, Hideki ^a   Tsukashima, Kouji ^a   Ohya, Akio ^a   Sawada, Ken ^a   Makiyama, Kozo ^a   Takahashi, Tsuyoshi ^a   Nishi, Masahiro ^a   Hirosce, Tatsuya ^a   Takikawa, Masahiko ^a   Watanabe, Yuu ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

Clock distributor; Fiber optical communication; Full rate architecture; HEMT; InP; Muliplexer; Phase adjuster; Re timer

Indexed keywords

CAPACITANCE; ELECTRIC SWITCHES; ELECTRON BEAM LITHOGRAPHY; FLIP FLOP CIRCUITS; OPTICAL COMMUNICATION; OPTICAL FIBERS; OPTICAL LINKS; SEMICONDUCTING INDIUM PHOSPHIDE;

POWER CONSUMPTION;

HIGH ELECTRON MOBILITY TRANSISTORS;

EID: 0036913626     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.804357     Document Type: Conference Paper

References (12)

1. T. Masuda, K. Ohhara, N. Shiramizu, E. Ohue, K. Oda, R. Hayami, H. Shimamoto, M. Kondo, T. Harada, and K. Washio, "40 Gb/s 4:1 multiplexer and 1:4 demultiplexer IC module using SiGe HBTs," in IEEE MTT-S Dig., 2001, pp. 1697-1700.
2. M. Meghelli, A. Rylyakov, and L. Shan, "50Gb/s SiGe BiCMOS 4:1 multiplexer and 1:4 demultiplexer for serial-communication systems," in IEEE ISSCC Dig. Tech. Papers, 2002, pp. 260-261.
3. J.P. Mattia, R. Pullela, G. Georgieu, Y. Baeyens, H.S. Tsai, Y.K. Chen, C. Dorschky, T. Winkler Von Mohrenfels, M. Reinhold, C. Groepper, M. Sokolich, L. Nguyen, and W. Stanchina, "High-speed multiplexers: A 50Gb/s 4:1 MUX in InP HBT technology," in IEES GaAs IC Symp. Tech. Dig., 1999, pp. 189-192.
4. K. Runge, R.L. Pierson, P.J. Zampardi, P.B. Thomas, J. Yu, and K.C. Wang, "40 Gbit/s AlGaAs/GaAs HBT 4:1 multiplexer IC," Electron. Lett., vol. 31, pp. 876-877, 1995.
5. T. Suzuki, H. Kano, Y. Nakasha, T. Takahashi, K. Imanishi, H. Ohnishi, and Y. Watanabe, "40-Gbit/s D-type flip-flop and multiplexer circuits using InP HEMT," in IEEE MTT-S Dig., 2001, pp. 595-598.
6. H. Kano, T. Suzuki, S. Yamaura, Y. Nakasha, K. Sawada, T. Takahashi, K. Makiyama, T. Hirose, and Y. Watanabe, "A 50-Gbit/s 1:4 demultiplexer IC in InP-based HEMT technology," in IEEE MTT-S. Dig., 2002, pp. 75-78.
7. H. Shigematsu, M. Sato, T. Suzuki, T. Takahashi, K. Imanishi, N. Hara, H. Ohnishi, and Y. Watanabe, "49-GHz preamplifier with a transimpedance gain of 52 dBΩ using InP HEMTs," IEEE J. Solid-State Circuits, vol. 36, pp, 1309-1313, Sept. 2001.
8. 3 modulator driver circuit," in IEEE GaAs IC Symp. Tech. Dig., 2001, pp. 137-140.
9. M. Green, A. Momtaz, K. Vakilian, X. Wang, K. Jen, D. Chung, J. Cao, M. Caresosa, A. Hairapetian, I. Fujimori, and Y. Cai, "OC-192 transmitter in standard 0.18μm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2002, pp. 248-249.
10. J. Cao, A. Momtaz, K. Vakilian, M. Green, D. Chung, K. Jen, M. Caresosa, B. Tan, I. Fujimori, and A. Hairapetian, "SONET OC-192 receiver in standard 0.18μm CMOS," in IEEE ISSCC Dig. Tech. Papers, 2002, pp. 250-251.
11. I.J. Bahl and D.K. Trivedi, "A designer's guide to microstrip line," Microwaves, vol. 16, pp. 174-182, May 1977.
12. T. Takahashi, M. Nihei, K. Makiyama, M. Nishi, T. Suzuki, and N. Hara, "Stable and uniform InAlAs/InGaAs HEMT IC's for 40-Gbit/s optical communication systems," in Proc. 2001 IPRM, pp. 614-617.