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Volumn 37, Issue 11, 2002, Pages 1479-1484

A quasi-matrix ferroelectric memory for future silicon storage

Author keywords

Ferroelectric capacitors; Ferroelectric memories; Nonvolatile memories

Indexed keywords

CAPACITORS; COMPUTER SIMULATION; CROSSTALK; FERROELECTRIC DEVICES; SPURIOUS SIGNAL NOISE; TRANSISTORS;

EID: 0036858570     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.802358     Document Type: Article
Times cited : (4)

References (5)
  • 1
    • 0002124792 scopus 로고    scopus 로고
    • A 130 mm2 256 Mb NAND flash with shallow trench isolation technology
    • K. Imamiya and Y. Sugiura et al., "A 130 mm2 256 Mb NAND flash with shallow trench isolation technology," ISSCC Dig. Tech. Papers, p. 112, 1999.
    • (1999) ISSCC Dig. Tech. Papers , pp. 112
    • Imamiya, K.1    Sugiura, Y.2
  • 2
    • 0024089464 scopus 로고
    • An experimental 512-bit nonvolatile memory with ferroelectric storage cell
    • J. T. Evans and R. Womack, "An experimental 512-bit nonvolatile memory with ferroelectric storage cell," IEEE J. Solid-State Circuits, vol. 23, p. 1171, 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , pp. 1171
    • Evans, J.T.1    Womack, R.2
  • 3
    • 0029252157 scopus 로고
    • A single-transistor ferroelectric memory cell
    • T. Nakamura and Y. Nakano et al., "A single-transistor ferroelectric memory cell," ISSCC Dig. Tech. Papers, p. 68, 1995.
    • (1995) ISSCC Dig. Tech. Papers , pp. 68
    • Nakamura, T.1    Nakano, Y.2
  • 5
    • 0033280506 scopus 로고    scopus 로고
    • A 3.3 V 4 Mb nonvolatile ferroelectric RAM with a selectively-driven double-pulsed plate read/write-back scheme
    • Y. Chung and M. Choi et al., "A 3.3 V 4 Mb nonvolatile ferroelectric RAM with a selectively-driven double-pulsed plate read/write-back scheme," Symp. VLSI Circuits Dig. Tech. Papers, p. 97, 1999.
    • (1999) Symp. VLSI Circuits Dig. Tech. Papers , pp. 97
    • Chung, Y.1    Choi, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.