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Volumn 7, Issue 4, 2002, Pages 325-339

Improving software performance with configurable logic

Author keywords

Codesign; Embedded systems; FPGA; Hardware software partitioning; Low energy; Synthesis

Indexed keywords

C (PROGRAMMING LANGUAGE); COMPUTER HARDWARE; COMPUTER SIMULATION; DATA FLOW ANALYSIS; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; PERFORMANCE; SYSTEMS ANALYSIS;

EID: 0036846599     PISSN: 09295585     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1020359206122     Document Type: Article
Times cited : (40)

References (24)
  • 1
    • 0027561268 scopus 로고
    • Processor Reconfiguration Through Instruction-Set Metamorphosis
    • March
    • Athanas, P., and H. Silverman. Processor Reconfiguration Through Instruction-Set Metamorphosis. Computer, vol. 26 no. 3, March 1993 pp. 11-18.
    • (1993) Computer , vol.26 , Issue.3 , pp. 11-18
    • Athanas, P.1    Silverman, H.2
  • 5
    • 0030784055 scopus 로고    scopus 로고
    • System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
    • Jan.
    • Eles, P., Z. Peng, K. Kuchchinski, and A. Doboli. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search. Kluwer's Design Automation for EmbeddedSystems, vol. 2, no. 1, pp. 5-32, Jan. 1997.
    • (1997) Kluwer's Design Automation for EmbeddedSystems , vol.2 , Issue.1 , pp. 5-32
    • Eles, P.1    Peng, Z.2    Kuchchinski, K.3    Doboli, A.4
  • 8
    • 0033884908 scopus 로고    scopus 로고
    • A Configurable and Extensible Processor
    • Gonzalez, R. and R E. Xtensa. A Configurable and Extensible Processor. IEEE Micro, pp. 60-70, 2000.
    • (2000) IEEE Micro , pp. 60-70
    • Gonzalez, R.1    Xtensa, R.E.2
  • 11
    • 52549091144 scopus 로고    scopus 로고
    • A High-Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems
    • The 2nd International Workshop on the Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), LasVegas, NV, June 26-29
    • Hammes, J., R Rinker, W Najjar, and B. Draper. A High-Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. In The 2nd International Workshop on the Engineering of Reconfigurable Hardware/Software Objects (ENREGLE), part of the 2000 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA), LasVegas, NV, June 26-29,2000.
    • (2000) 2000 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA)
    • Hammes, J.1    Rinker, R.2    Najjar, W.3    Draper, B.4
  • 15
    • 0031101366 scopus 로고    scopus 로고
    • The Extended Partitioning Problem: Hardware/Software Mapping, Scheduling and Implementation-Bin Selection
    • Mar.
    • Kalavade, A. and E. A. Lee. The Extended Partitioning Problem: Hardware/Software Mapping, Scheduling and Implementation-Bin Selection. Kluwer Design Automation for Embedded Systems, vol. 2, no. 2, pp. 125-163, Mar. 1997.
    • (1997) Kluwer Design Automation for Embedded Systems , vol.2 , Issue.2 , pp. 125-163
    • Kalavade, A.1    Lee, E.A.2
  • 18
    • 0011291883 scopus 로고    scopus 로고
    • MIPS Technologies, Inc.
    • MIPS Technologies, Inc. http: //www.mips.com.
  • 20
    • 0011362896 scopus 로고    scopus 로고
    • Synplicity
    • Synplicity, www.synplicity.com/products/synplifypro.html.
  • 21
    • 0011376501 scopus 로고    scopus 로고
    • Triscend Corporation
    • Triscend Corporation, http: //www.triscend.com.
  • 22
    • 52549131117 scopus 로고    scopus 로고
    • UCRDalton Project
    • UCRDalton Project, http://www.cs.ucr.edu/~dalton/.
  • 24
    • 0011328042 scopus 로고    scopus 로고
    • Virtex Power Estimator
    • Virtex Power Estimator, http://support.xilinx.com/cgi-bin/powerweb.pl.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.