A new FPGA/DSP-based parallel architecture for real-time image processing

Real-Time Imaging

Volumn 8, Issue 5, 2002, Pages 345-356

  Batlle, J ^a   Martí, Joan ^a   Ridao, Pere ^a   Amat, J ^b  

^a UNIVERSITY OF GIRONA   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DIGITAL SIGNAL PROCESSING; FIELD PROGRAMMABLE GATE ARRAYS; PARALLEL PROCESSING SYSTEMS; REAL TIME SYSTEMS;

VIDEO-RATE LINKS;

COMPUTER VISION;

EID: 0036817074     PISSN: 10072014     EISSN: None     Source Type: Journal    
DOI: 10.1006/rtim.2001.0273     Document Type: Article

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