Resolution of a current-mode algorithmic analog-to-digital converter

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 49, Issue 10, 2002, Pages 1480-1486

  Giustolisi, G ^a   Palumbo, G ^a   Pennisi, S ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

Analog digital conversion; Circuit analysis; CMOS analog integrated circuits; Error analysis; Mixed analog digital integrated circuits; Tolerance analysis

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ERROR ANALYSIS; LINEAR INTEGRATED CIRCUITS; STATISTICAL METHODS;

CIRCUIT ANALYSIS; TOLERANCE ANALYSIS;

ANALOG TO DIGITAL CONVERSION;

EID: 0036805159     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2002.803353     Document Type: Article

References (14)

1. C. Toumazou, F. Lidgey, and D. Haigh, Eds., Analogue IC Design: The Current-Mode Approach. Stevenage, U.K.: Peregrinus, 1990.
2. D. G. Nairn and C. A. T. Salama, "A ratio-independent algorithmic analog-to-digital converter combining current mode and dynamic techniques," IEEE Trans. Circuits Syst., vol. 37, pp. 319-325, Mar. 1990.
3. D. G. Nairn and C. A. T. Salama, "Current-mode algorithmic analog-to-digital converters," IEEE J. Solid-State Circuits, vol. 5, pp. 997-1003, Aug. 1990.
4. A. Cujec, C. Salama, and D. Nairn, "An optimized bit cell design for a pipelined current-mode algorithmic A/D converter," Int. J. Analog Integrated Circuits and Signal Processing, no. 3, pp. 137-141, 1993.
5. Z. Wang, "Design methodology of CMOS algorithmic current A/D converters in view of transistor mismatches," IEEE Trans. Circuits Syst., vol. 38, pp. 660-667, June 1991.
6. C. Wey, S. Krishnan, and S. Sahli, "Design of concurrent error detectable current-mode A/D converters for real-time applications," Int. J. Analog Integrated Circuits and Signal Processing, no. 4, pp. 65-74, 1993.
7. D. Freitas and K. Current, "CMOS current comparator circuit," Electron. Lett., vol. 19, no. 17, pp. 695-697, Aug. 1983.
8. G. Palmisano and G. Palumbo, "High performance CMOS current comparator design," IEEE Trans. Circuits Syst. II, vol. 43, pp. 785-790, Dec. 1996.
9. P. Crawley and G. Roberts, "High-swing MOS current mirror with arbitrarily high output resistance," Electron. Lett., vol. 28, no. 4, pp. 361-363, Feb. 1992.
10. G. Palmisano, G. Palumbo, and S. Pennisi, CMOS Current Amplifiers. New York: Academic 1999.
11. K. Lakshmikumar, R. Hadaway, and M. Copeland, "Characterization and modeling of mismatch in MOS transistors for precision analog design," IEEE J. Solid-State Circuits, vol. SC-21, pp. 1057-1066, Dec. 1986.
12. M. Pelgrom, A. Duinmaijer, and A. Welbers, "Matching properties of MOS transistors," IEEE J. Solid-State Circuits, vol. 24, pp. 1433-1440, Dec. 1989.
13. R. van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters. New York: Academic, 1994.
14. Papoulis, Probability, Random Variables and Stochastic Processes, 3rd ed. New York: McGraw-Hill, 1991.