A 48-16-MHz CMOS SC decimation filter

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 10, 2002, Pages 1282-1289

  Barúqui, Fernando Antônio Pinto ^b   Petraglia, Antonio ^a,b   Franca, José E ^c  

^a IEEE   (Brazil)

^b FEDERAL UNIVERSITY OF RIO DE JANEIRO   (Brazil)

^c INSTITUTO SUPERIOR TÉCNICO   (Portugal)

Author keywords

Antialiasing; CMOS analog integrated circuits; Filters; Multirate; Sampled data filters; Switched capacitor filters

Indexed keywords

CMOS ANALOG INTEGRATED CIRCUITS; CMOS SWITCHED-CAPACITOR DECIMATION FILTER; MULTIRATE; SAMPLED-DATA FILTERS;

ANTI-ALIASING; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; FREQUENCY RESPONSE; IMAGE COMMUNICATION SYSTEMS; INTEGRATED CIRCUIT LAYOUT; LINEAR INTEGRATED CIRCUITS; SPECIFICATIONS; SWITCHED FILTERS;

MOS DEVICES;

EID: 0036772709     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2002.803020     Document Type: Article

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