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Volumn 32, Issue 3, 2002, Pages 219-230

A 1.2 V rail-to-rail analog CMOS rank-order filter with k-WTA capability

Author keywords

k WTA; Low voltage operation; Rank order filter

Indexed keywords

COMPARATOR CIRCUITS; COMPUTER SIMULATION; DIGITAL FILTERS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING;

EID: 0036754226     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1020395524854     Document Type: Article
Times cited : (10)

References (10)
  • 2
    • 0027590834 scopus 로고
    • A high-precision VLSI winner-take-all circuit for self-organizing neural networks
    • Choi, J. and Sheu, B. J., "A high-precision VLSI winner-take-all circuit for self-organizing neural networks." IEEE J. Solid-State Circuits 28(5), pp. 576-583, 1993.
    • (1993) IEEE J. Solid-State Circuits , vol.28 , Issue.5 , pp. 576-583
    • Choi, J.1    Sheu, B.J.2
  • 3
    • 0025448088 scopus 로고
    • Fuzzy multiple-input maximum and minimum circuits in current mode and their analyses using bounded-difference equations
    • Sasaki, M., Inoue, T., Shirai, Y. and Ueno, F., "Fuzzy multiple-input maximum and minimum circuits in current mode and their analyses using bounded-difference equations." IEEE Trans. Comput. 39(6), pp. 768-774, 1990.
    • (1990) IEEE Trans. Comput. , vol.39 , Issue.6 , pp. 768-774
    • Sasaki, M.1    Inoue, T.2    Shirai, Y.3    Ueno, F.4
  • 4
    • 0028548736 scopus 로고
    • Current-mode multiple input maximum circuit for fuzzy logic controllers
    • Huang, C. Y. and Liu, B. D., "Current-mode multiple input maximum circuit for fuzzy logic controllers." Electron. Lett. 30(23), pp. 1924-1925, 1994.
    • (1994) Electron. Lett. , vol.30 , Issue.23 , pp. 1924-1925
    • Huang, C.Y.1    Liu, B.D.2
  • 6
    • 0011200463 scopus 로고
    • Analog sorting network ranks inputs by amplitude and allows selection
    • Morgan, D. R., "Analog sorting network ranks inputs by amplitude and allows selection." Electron. Design, pp. 72-73, 1973.
    • (1973) Electron. Design , pp. 72-73
    • Morgan, D.R.1
  • 7
    • 0024054128 scopus 로고
    • Analog implementation of median filters for real-time signal processing
    • Lin, J. S. J. and Holmes, W. H., "Analog implementation of median filters for real-time signal processing." IEEE Trans. Circuits Syst. 35, pp. 1032-1033, 1988.
    • (1988) IEEE Trans. Circuits Syst. , vol.35 , pp. 1032-1033
    • Lin, J.S.J.1    Holmes, W.H.2
  • 9
    • 0027560661 scopus 로고
    • A review of median filter systems for analog signal processing
    • Jarske, T. and Vainio, O., "A review of median filter systems for analog signal processing." Analog Integr. Circuits Signal Process 3, pp. 127-135, 1993.
    • (1993) Analog Integr. Circuits Signal Process , vol.3 , pp. 127-135
    • Jarske, T.1    Vainio, O.2
  • 10
    • 0025382945 scopus 로고
    • An 8-bit 20-MS/s CMOS A/D converter with 50-mW power consumption
    • Hosotani, S., Miki, T., Maeda, A. and Yazawa, N., "An 8-bit 20-MS/s CMOS A/D converter with 50-mW power consumption." IEEE J. Solid-State Circuits 25(1), pp. 167-172, 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.1 , pp. 167-172
    • Hosotani, S.1    Miki, T.2    Maeda, A.3    Yazawa, N.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.