Table look-up model of thin-film transistors for circuit simulation using spline interpolation with transformation by y = x + log(x)

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 21, Issue 9, 2002, Pages 1101-1104

  Kimura, Mutsumi ^a   Inoue, Satoshi ^a   Shimoda, Tatsuya ^a  

^a SEIKO EPSON CORPORATION   (Japan)

Author keywords

Circuit simulation; Spline interpolation; Table look up model; Thin film transistor; Transformation

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; CONVERGENCE OF NUMERICAL METHODS; CURRENT VOLTAGE CHARACTERISTICS; DIFFERENTIATION (CALCULUS); INTERPOLATION; MATHEMATICAL TRANSFORMATIONS; POLYNOMIALS; TABLE LOOKUP;

LINEAR EXTRAPOLATION; PIECEWISE POLYNOMIAL FUNCTION; SPLINE INTERPOLATION;

THIN FILM TRANSISTORS;

EID: 0036734971     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2002.801090     Document Type: Article

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