Evolution of grain and micro-void structure in electroplated copper interconnects

Materials Transactions

Volumn 43, Issue 7, 2002, Pages 1629-1632

  Hobbs, Anthony ^a   Murakami, Satoshi ^a   Hosoda, Tsotomi ^a   Ohtsuka, Satoshi ^a   Miyajima, Motoshu ^a   Sugatani, Shinji ^a   Nakamura, Tomoji ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

Annealing; Copper; Grain size; Transmission electron microscopy (TEM); Voids

Indexed keywords

ANNEALING; COPPER; ELECTROPLATED PRODUCTS; ELECTROPLATING; GRAIN BOUNDARIES; GRAIN SIZE AND SHAPE; THERMODYNAMIC STABILITY; TRANSMISSION ELECTRON MICROSCOPY;

ELECTROPLATED WAFERS;

ELECTRIC CONNECTORS;

EID: 0036630668     PISSN: 13459678     EISSN: None     Source Type: Journal    
DOI: 10.2320/matertrans.43.1629     Document Type: Article

References (4)