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Volumn 48, Issue 1, 2002, Pages 57-61

Design of a 3780-point IFFT processor for TDS-OFDM

Author keywords

Circuit optimization; FFT; HDTV; Pipeline processing; Signal processing

Indexed keywords

ALGORITHMS; DIGITAL TELEVISION; ERROR ANALYSIS; FAST FOURIER TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS; OPTIMIZATION; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; PIPELINE PROCESSING SYSTEMS; RANDOM ACCESS STORAGE; SIGNAL TO NOISE RATIO; TELEVISION TRANSMITTERS; TIME DOMAIN ANALYSIS;

EID: 0036505179     PISSN: 00189316     EISSN: None     Source Type: Journal    
DOI: 10.1109/11.992857     Document Type: Article
Times cited : (46)

References (13)
  • 4
    • 84966217500 scopus 로고
    • On computing the discrete Fourier transform
    • Jan.
    • (1978) Math. Compet. , vol.32 , Issue.141 , pp. 175-199
  • 11
    • 0009056436 scopus 로고
    • Adder-based SIMD-systolic architectures and VLSI chip for computing the Winograd small FFT algorithms
    • (1994) Electronics , vol.76 , Issue.6 , pp. 1135-1149
    • Wu, C.M.1    Wang, R.T.2    Yen, C.T.3
  • 13
    • 0000819658 scopus 로고
    • The interaction algorithm and practical Fourier series
    • (1960) Addendum , vol.22 , pp. 372-375
    • Good, I.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.