Analysis of wafer fabrication facilities using four variations of the open queueing network decomposition model

IIE Transactions (Institute of Industrial Engineers)

Volumn 34, Issue 3, 2002, Pages 263-272

  Miltenburg, John ^a   Cheng, Chun Hung ^b   Yan, Houmin ^b  

^a MCMASTER UNIVERSITY   (Canada)

^b CHINESE UNIVERSITY OF HONG KONG   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

CLEAN ROOMS; COMPUTER SIMULATION; COMPUTER WORKSTATIONS; INTEGRATED CIRCUIT MANUFACTURE; PROBABILITY DISTRIBUTIONS; SEMICONDUCTOR DEVICE MANUFACTURE; SERVERS; SILICON WAFERS; SYSTEMS ANALYSIS;

CYCLE TIME; OPEN QUEUEING NETWORK DECOMPOSITION MODEL; WAFER FABRICATION FACILITIES; WORK-IN-PROCESS INVENTORY;

QUEUEING NETWORKS;

EID: 0036498120     PISSN: 0740817X     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1012481300018     Document Type: Article

References (9)

1. Multiproduct queueing networks with deterministic routing: Decomposition approach and the notion of interference
2. Performance analysis techniques for IC manufacturing lines
3. Approximate analysis of general open queueing networks with restricted capacity
4. Simulation of VLSI manufacturing areas
5. Planning and scheduling in Japanese semiconductor manufacturing
6. Performance evaluation of production networks
7. The queueing network analyzer
8. Variability functions for parametric-decomposition approximations of queueing networks