SOI design experiences with Motorola's high-performance processors

IEEE International SOI Conference

Volumn , Issue , 2002, Pages 6-9

  Bearden, David ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; DELAY CIRCUITS; FIELD EFFECT TRANSISTORS; MICROPROCESSOR CHIPS; SWITCHING CIRCUITS; THIN FILM CIRCUITS;

VOLTAGE FLUCTUATIONS;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0036456788     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/soi.2002.1044397     Document Type: Conference Paper

References (7)

1. S. Wilson, M. Mendicino, M. Alles, "TFSOI Circuit Applications", Proc. of the 8th Int. Symp. on SOI Technology and Devices, 1997.
2. Mica 1.2.0 User's Manual, unpublished document, Austin, TX, Motorola, Inc., 2002.
3. K. Bernstein, N. Rohrer, "SOI Circuit Design Concepts, Kluwer Academic Publishers.
4. R. Joshi et al., "High Performance SRAMS in 1.5V, 0.18mm PD SOI Technology", IEEE Symp. on VLSI Circuits, 2002.
5. C. Snyder, "Best Processors Vie For Gold", Microprocessor Report, March, 2002.
6. B. Dunnigan, "Host Processors Roadmap", Motorola 2002 Smart Networks Developers Forum.
7. M. Celik et al., "A 45nm Gate Length High Performance SOI Transistor for 100nm CMOS Technology Applications", IEEE Symp. on VLSI Tech., 2002.