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Volumn 70, Issue , 2002, Pages

Design and implementation of a multi-terabit optical burst/packet router prototype

Author keywords

[No Author keywords available]

Indexed keywords

NETWORK PROTOCOLS; OPTICAL COMMUNICATION; OPTICAL DESIGN; OPTICAL SWITCHES; PACKET NETWORKS; PACKET SWITCHING; TRANSCEIVERS;

EID: 0036440536     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (34)

References (2)
  • 1
    • 0034829883 scopus 로고    scopus 로고
    • A highly integrated 32-SOA gates optoelectronic module suitable for IP multi-terabit optical packet routers
    • Postdeadline paper
    • N. Sahri et al. "A highly integrated 32-SOA gates optoelectronic module suitable for IP multi-terabit optical packet routers", Postdeadline paper, OFC 2001.
    • (2001) OFC
    • Sahri, N.1
  • 2
    • 0035740973 scopus 로고    scopus 로고
    • First demonstration of an asynchronous optical packet switching matrix prototype for MultiTerabit-class routers/switches
    • Postdeadline paper
    • D. Chiaroni et al., "First demonstration of an asynchronous optical packet switching matrix prototype for MultiTerabit-class routers/switches", Postdeadline paper, ECOC 2001.
    • (2001) ECOC
    • Chiaroni, D.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.