Design of LDPC graphs for hardware implementation

IEEE International Symposium on Information Theory - Proceedings

Volumn , Issue , 2002, Pages 483-

  Thorpe, Jeremy ^a  

^a CALIFORNIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPARTITE GRAPHS;

ALGORITHMS; COMPUTER HARDWARE; DECODING; ERROR CORRECTION; GRAPH THEORY; SIMULATED ANNEALING;

CODES (SYMBOLS);

EID: 0036353604     PISSN: 21578095     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)