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Volumn , Issue , 2002, Pages 407-410
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Geometry and bias current optimization for SiGe HBT cascode low-noise amplifiers
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER SIMULATION;
ELECTRIC CURRENTS;
ELECTRIC IMPEDANCE;
HETEROJUNCTION BIPOLAR TRANSISTORS;
OPTIMIZATION;
SEMICONDUCTING SILICON COMPOUNDS;
SPURIOUS SIGNAL NOISE;
LOW-NOISE AMPLIFIERS (LNA);
AMPLIFIERS (ELECTRONIC);
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EID: 0036309636
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (23)
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References (4)
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