A digital self-calibration method for pipeline A/D converters

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2002, Pages

  Sumanen, Lauri ^a   Waltari, Mikko ^a   Korhonen, Tuomas ^a   Halonen, Kari ^a  

^a AALTO UNIVERSITY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); ANALOG TO DIGITAL CONVERSION; BIT ERROR RATE; CALIBRATION; CAPACITORS; COMPUTER SIMULATION; DIGITAL CIRCUITS; GAIN MEASUREMENT; SWITCHES;

CAPACITOR MISMATCH; DIGITAL SELF CALIBRATION;

FREQUENCY CONVERTERS;

EID: 0036294543     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A low power 14-b 5 MS/s CMOS pipeline ADC with background analog self-calibration
2. Digital-domain calibration for multistep analog-to-digital converters
3. A 15-b 1-Msample/s digitally self-calibrated pipeline ADC
4. An architecture and an algorithm for fully digital correction of monolithic pipelined ADC's
5. A self-calibrated pipeline ADC with 200MHz IF-sampling frontend