Design and implementation of the symmetrically extended 2-D wavelet transform

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 3, Issue , 2002, Pages 3108-3111

  McCanny, Paul ^a   Masud, Shahid ^b   McCanny, John ^a,b  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

^b Amphion Semiconductor Ltd   (Ireland)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; FIELD PROGRAMMABLE GATE ARRAYS; STANDARDS; VLSI CIRCUITS; WAVELET TRANSFORMS;

DISCRETE WAVELET TRANSFORM; TWO DIMENSIONAL WAVELET TRANSFORM; VLSI ARCHITECTURE;

IMAGE COMPRESSION;

EID: 0036293562     PISSN: 15206149     EISSN: None     Source Type: Journal    
DOI: 10.1109/ICASSP.2002.5745307     Document Type: Article

References (10)

1. JPEG 2000 part I final committee draft version 1.0
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3. VLSI architectures for the discrete wavelet transform
4. Efficient realizations of encoders and decoders based on the 2-D discrete wavelet transform
5. A DWT-based encoder architecture for symmetrically extended images
6. A VLSI architecture for lifting-based wavelet transform
7. Efficient high-speed/low-power pipelined architecture for the direct 2-D discrete wavelet transform
8. An efficient architecture for the 2-D biorthogonal wavelet transform architecture
9. Handling borders in systolic architectures for the 1-D discrete wavelet transform for perfect reconstruction
10. Rapid design of biorthogonal wavelet transforms