|
Volumn 2, Issue , 2002, Pages
|
Fast-settling CMOS two-stage operational transconductance amplifiers and their systematic design
a a a |
Author keywords
[No Author keywords available]
|
Indexed keywords
CMOS INTEGRATED CIRCUITS;
ELECTRIC NETWORK ANALYSIS;
EQUIVALENT CIRCUITS;
LAPLACE TRANSFORMS;
POLES AND ZEROS;
SYSTEMS ANALYSIS;
TRANSCONDUCTANCE;
TRANSFER FUNCTIONS;
MINIMUM SETTLING TIME;
OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS;
OPERATIONAL AMPLIFIERS;
|
EID: 0036287477
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (25)
|
References (4)
|