Design and implementation of a novel algorithm for general purpose median filtering on FPGAs

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 2002, Pages

  Benkrid, K ^a   Crookes, D ^a   Benkrid, A ^a  

^a QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL FILTERS; IMAGE PROCESSING; IMPULSE NOISE; OPTIMIZATION; SPURIOUS SIGNAL NOISE;

BUBBLE SORT APPROACH; HARDWARE COMPLEXITY; MEDIAN FILTERING;

SIGNAL FILTERING AND PREDICTION;

EID: 0036287457     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. A fast two-dimensional median filtering algorithm
2. On computation of the running median
3. VLSI median filter for impulse noise elimination in composite or component TV signals
4. Design and implementation of a single chip 1-D median filter
5. FPGA implementation of a median filter
6. Implementing median filters in XC4000E FPGAs
7. Programmable 2D linear filter for video applications
8. Design and FPGA implementation of a novel general purpose median filter