A nonlinearity-corrected CMOS time digitizer IC with 20 PS single-shot precision

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2002, Pages

  Mäntyniemi, Antti ^a   Rahkonen, Timo ^a   Kostamovaara, Juha ^a  

^a UNIVERSITY OF OULU   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

DELAY CIRCUITS; DIGITAL INTEGRATED CIRCUITS; NONLINEAR NETWORK ANALYSIS; PHASE LOCKED LOOPS; PULSE ANALYZING CIRCUITS; TIMING CIRCUITS;

DELAY LOCKED LOOP; INTEGRAL NONLINEARITY; NONLINEARITY CORRECTED INTEGRATED CIRCUIT; TIME DIGITIZER INTEGRATED CIRCUIT;

CMOS INTEGRATED CIRCUITS;

EID: 0036287077     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. An integrated 9-channel time digitizer with 30 ps resolution
2. A high-resolution time interpolator based on a delay locked loop and an RC delay line
3. A high resolution multihit time to digital converter integrated circuit
4. Error analysis and design of the Nutt time-interval digitizer with picosecond resolution
5. A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching
6. A low-jitter skew-calibrated multi-phase clock generator for time-interleaved applications
7. Circuits for on-chip sub-nanosecond signal capture and characterization
8. Non-linearity reduction technique for delay-locked delay-lines
9. Interpolating time counter with 100 ps resolution on a single FPGA device
10. Nonlinearity correction of the integrated time-to-digital converter with direct coding