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Volumn 1, Issue , 2002, Pages
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Inductance/area/resistance tradeoffs in high performance power distribution grids
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTATIONAL COMPLEXITY;
DIGITAL INTEGRATED CIRCUITS;
ELECTRIC POWER SUPPLIES TO APPARATUS;
ELECTRIC RESISTANCE;
FLIP CHIP DEVICES;
INDUCTANCE;
INTERCONNECTION NETWORKS;
MATHEMATICAL MODELS;
SPURIOUS SIGNAL NOISE;
ON-CHIP INTERCONNECT;
POWER DISTRIBUTION NETWORKS;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0036283212
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (14)
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References (8)
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