1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue SUPPL., 2002, Pages 218-219+481

  Narendra, Siva ^a   Haycock, Matthew ^a   Govindarajulu, Venkatesh ^a   Erraguntla, Vasantha ^a   Wilson, Howard ^a   Vangal, Sriram ^a   Pangal, Amaresh ^a   Seligman, Erik ^a   Nair, Raj ^a   Keshavarzi, Ali ^a   Bloechel, Bradley ^a   Dermer, Gregory ^a   Mooney, Randy ^a   Borkar, Nitin ^a   Borkar, Shekhar ^a   De, Vivek ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; ELECTRIC POWER MEASUREMENT; MICROPROCESSOR CHIPS; OPERATIONAL AMPLIFIERS; SPURIOUS SIGNAL NOISE; TRANSCONDUCTANCE;

COMMUNICATION ROUTERS;

ROUTERS;

EID: 0036224161     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)