A formal specification and verification framework for time warp-based parallel simulation

IEEE Transactions on Software Engineering

Volumn 28, Issue 1, 2002, Pages 58-78

  Frey, Peter ^b   Radhakrishnan, Radharamanan ^c   Carter, Harold W ^a,c   Wilsey, Philip A ^a,c   Alexander, Perry ^a,d  

^a IEEE

^b CADENCE DESIGN SYSTEMS   (United States)

^c 705 Engineering Research Center   (United States)

^d UNIVERSITY OF KANSAS   (United States)

Author keywords

Formal specification; Formal verification; Parallel discrete event simulation; Theorem proving; Time warp

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; CONGESTION CONTROL (COMMUNICATION); NETWORK PROTOCOLS; RESOURCE ALLOCATION; REUSABILITY; SEMANTICS; THEOREM PROVING;

FORMAL SPECIFICATION; FORMAL VERIFICATION; PARALLEL DISCRETE EVENT SIMULATION; PROTOTYPE VERIFICATION SYSTEM; TIME WARP;

COMPUTER HARDWARE DESCRIPTION LANGUAGES;

EID: 0036158430     PISSN: 00985589     EISSN: None     Source Type: Journal    
DOI: 10.1109/32.979989     Document Type: Article

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