Application of gate oxide integrity to the evaluation of the efficiency of internal and external gettering sites in Si wafers

Solid State Phenomena

Volumn 82-84, Issue , 2002, Pages 393-398

  Koveshnikov, S ^a   Beauchaine, D ^a   Radzimski, Z ^a   Ling, L ^a   Ravi, K V ^a  

^a SHIN ETSU CHEMICAL CO LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CONTAMINATION; COPPER; DEFECTS; MATHEMATICAL MODELS; NICKEL; SEMICONDUCTOR DEVICE MANUFACTURE;

GATE OXIDE INTEGRITY; GETTERING SITES; METALLIC IMPURITY;

SILICON WAFERS;

EID: 0036131727     PISSN: 10120394     EISSN: None     Source Type: Book Series    
DOI: None     Document Type: Conference Paper

References (10)

1. The physics and chemistry of SiO2 and Si-SiO2 interface - 4
2. Defect and impurity engineered semiconductors and devices
3. High purity silicon
4. ULSI process integration II