A packet-memory-integrated 44 Gb/s switching processor with a 10 Gb port and 12 Gb ports

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 52-53+443+51

  Lau, Michael ^a   Shieh, Sam ^a   Wang, Pei Feng ^a   Smith, Brandon ^a   Yuan, Min Shueh ^a   Lee, Dennis ^a   Gaba, James ^a   Chao, Jason ^a   Shung, Bernard ^a   Shih, Cheng Chung ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; INTERFACES (COMPUTER); LOCAL AREA NETWORKS; MICROPROCESSOR CHIPS; PACKET SWITCHING; QUALITY OF SERVICE; SEARCH ENGINES; SIGNALING; TRANSCEIVERS;

DUAL DATA RATE (DDR);

DIGITAL SIGNAL PROCESSING;

EID: 0036108538     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)