A 125 mm2 1 Gb NAND flash memory with 10 MB/s program throughput

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 106-107+450+99

  Nakamura, Hiroshi ^a   Imamiya, Kenichi ^a   Himeno, Toshihiko ^a   Yamamura, Toshio ^a   Ikehashi, Tamio ^a   Takeuchi, Ken ^a   Kanda, Kazushige ^a   Hosono, Koji ^a   Futatsuyama, Takuya ^a   Kawai, Koichi ^a   Shirota, Riichiro ^a   Arai, Norihisa ^a   Arai, Fumitaka ^a   Hatakeyama, Kazuo ^a   Hazama, Hiroaki ^a   Saito, Masanobu ^a   Meguro, Hisataka ^a   Conley, Kevin ^a   Quader, Khandker ^a   Chen, Jian ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING; DATA TRANSFER; FLIP FLOP CIRCUITS; MICROPROCESSOR CHIPS; NAND CIRCUITS;

DATA CACHES (DC);

FLASH MEMORY;

EID: 0036107954     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. 2 256 Mb NAND flash with shallow trench isolation technology
2. A 3.3V 1 Gb multi-level NAND flash memory with non-uniform threshold voltage distribution
3. 2) NAND flash technology using Super-Shallow-Channel-Profile (SSCP) engineering
4. A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory
5. A novel sense amplifier for flexible voltage operation NAND flash memories