A 400 MHz 32 b embedded microprocessor core AM34-1 with 4.0 GB/S cross-bar bus switch for SoC

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 342-343+472+333

  Nakajima, Masaitsu ^a   Yamamoto, Takao ^a   Ozaki, Shinji ^a   Sezaki, Tomohisa ^a   Kanakogi, Tomochika ^a   Furuzono, Takanori ^a   Sakamoto, Takeshi ^a   Aruga, Toshihisa ^a   Sumita, Masaya ^a   Tsutsumi, Masanori ^a   Ueda, Akira ^a   Ichinomiya, Takahiro ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CMOS INTEGRATED CIRCUITS; EMBEDDED SYSTEMS; LEAKAGE CURRENTS; PHASE LOCKED LOOPS; REDUCED INSTRUCTION SET COMPUTING; SWITCHING CIRCUITS;

CROSS-BAR BUS SWITCHES;

MICROPROCESSOR CHIPS;

EID: 0036103127     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. A 800 MHz single cycle access 32 entry fully associative TLB with A 240 ps access match circuit
2. Implement Cross-bar switch on VLSI for Consumer Electronics