IP delivery for FPGAs using applets and JHDL

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 2-7

  Wirthlin, Michael J ^a   McMurtrey, Brian ^a  

^a BRIGHAM YOUNG UNIVERSITY   (United States)

Author keywords

Applet; FPGA; Intellectual Property; JHDL

Indexed keywords

JAVA APPLETS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTELLECTUAL PROPERTY; JAVA PROGRAMMING LANGUAGE; WEB BROWSERS;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 0036059364     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2002.1012584     Document Type: Article

References (9)

1. Virtual simulation of distributed ip-based design
2. A Web-CAD methodology for IP-core anayisis and simulation
3. A CAD suite for high-performance FPGA design
4. Using general-purpose programming languages for FPGA design
5. Automated extraction of run-time parameterisable cores from programmable device configurations
6. Hardware metering
7. Robust FPGA intellectual property protection through multiple small watermarks
8. Efficient constant coefficient multiplication using advanced FPGA architectures