Efficient stimulus independent timing abstraction model based on a new concept of circuit block transparency

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 158-163

  Foltin, Martin ^a   Foutz, Brian ^a   Tyler, Sean ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

Circuit optimization; Timing analysis; Timing model; VLSI design

Indexed keywords

STATIC TIMING ANALYSIS (STA);

COMPUTER SIMULATION; INTELLECTUAL PROPERTY; MICROPROCESSOR CHIPS; TIMING CIRCUITS; TRANSISTORS;

DIGITAL CIRCUITS;

EID: 0036057485     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2002.1012612     Document Type: Article

References (7)

1. Timing analysis of computer hardware
2. Timing analysis for the PA-8000
3. Timing abstraction of intellectual property blocks
4. Critical paths in circuits with level-sensitive latches