600 MHz DSP for baseband processing in 3G base stations

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2002, Pages 393-396

  Wolf, Tod ^a   Hocevar, Dale ^a   Gatherer, Alan ^a   Geremia, Patrick ^a   Laine, Armelle ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DECODING; ERROR CORRECTION; ITERATIVE METHODS; PIPELINE PROCESSING SYSTEMS; POLYNOMIALS; TURBO CODES;

EXTERNAL MEMORY INTERFACES (EMIF); TURBO DECODERS;

MICROPROCESSOR CHIPS;

EID: 0036054265     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. Generalized trace back techniques for survivor memory management in the Viterbi algorithm
2. Near Shannon limit error correcting coding and decoding: Turbo codes