UX6-100 nm generation CMOS integration technology with Cu / low-k interconnect

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 64-65

  Fukasaku, K ^a   Ono, A ^a   Hirai, T ^a   Yasuda, Y ^a   Okada, N ^a   Koyama, S ^a   Tamura, T ^a   Yamada, Y ^a   Nakata, T ^a   Yamana, M ^a   Ikezawa, N ^a   Matsuda, T ^a   Arita, K ^a   Nambu, H ^a   Nishizawa, A ^a   Nakabeppu, K ^a   Nakamura, N ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; GATES (TRANSISTOR); LEAKAGE CURRENTS; STATIC RANDOM ACCESS STORAGE; TRANSMISSION ELECTRON MICROSCOPY;

GATE DIELECTRICS;

CMOS INTEGRATED CIRCUITS;

EID: 0036053622     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)