Integration of high-performance, low-leakage and mixed signal features into a 100 nm CMOS technology

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 62-63

  Schafbauer, Thomas ^a   Brighten, James ^a   Chen, Yi Cheng ^a   Clevenger, Larry ^a   Commons, Martin ^a   Cowley, Andy ^a   Esmark, Kai ^a   Grassmann, Andreas ^a   Hodel, Uwe ^a   Huang, Hsiang Jen ^a   Huang, Shih Fen ^a   Huang, Yimin ^a   Kaltalioglu, Erdem ^a   Knoblinger, Gerhard ^a   Lee, Ming Tsan ^a   Leslie, Alan ^a   Leung, Pak ^a   Li, Baozhen ^a   Lin, Chuan ^a   Lin, Yi Hsiung ^a   Nissl, Walter ^a   Nguyen, Phung ^a   Olbrich, Alexander ^a   Riess, Philipp ^a   Rovedo, Nivo ^a   Sportouch, Sandrine ^a   Thomas, Al ^a   Vietzke, Dirk ^a   Wendel, Martin ^a   Wong, Robert ^a   Ye, Qiuyi ^a   Lin, Kun Chi ^a   Schiml, Thomas ^a   Wann, Clement ^a   more..

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; DYNAMIC RANDOM ACCESS STORAGE; GATES (TRANSISTOR); LEAKAGE CURRENTS; STATIC RANDOM ACCESS STORAGE;

GATE DIELECTRICS;

CMOS INTEGRATED CIRCUITS;

EID: 0036049224     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)