<100> channel strained-SiGe p-MOSFET with enhanced hole mobility and lower parasitic resistance

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2002, Pages 94-95

  Shima, M ^a   Ueno, T ^a   Kumise, T ^a   Shido, H ^a   Sakuma, Y ^a   Nakamura, S ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; HOLE MOBILITY; SEMICONDUCTING SILICON COMPOUNDS; STRAIN; THRESHOLD VOLTAGE;

PARASITIC RESISTANCE;

MOSFET DEVICES;

EID: 0036047592     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)