Optimal time borrowing analysis and timing budgeting optimization for latch-based designs

ACM Transactions on Design Automation of Electronic Systems

Volumn 7, Issue 1, 2002, Pages 217-230

  Lin, Shi Zheng Eric ^a   Changfan, Chieh ^b   Hsu, Yu Chin ^b   Tsai, Fur Shing ^b  

^a Verplex Systems Inc   (United States)

^b Novas Software Inc   (United States)

Author keywords

Cycle stealing; Latch based design; Static timing analysis; Time borrowing; Timing budgeting

Indexed keywords

ALGORITHMS; LINEAR PROGRAMMING; OPTIMIZATION; PRINTED CIRCUIT DESIGN; PROBLEM SOLVING;

STATIC TIMING ANALYSIS;

FLIP FLOP CIRCUITS;

EID: 0036005110     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/504914.504924     Document Type: Article

References (6)

1. Timing analysis with known false subgraphs
2. A timing analysis algorithm for circuits with level-sensitive latches
3. Analysis and design of latch-controlled synchronous digital circuits
4. Check tc and rain tc: Timing verification and optimal clocking of synchronous digital circuit
5. Computing optimal clock schedules
6. Verifying clock schedules